Project
Reverse Dependencies for rggen-c-header
The projects listed here declare rggen-c-header as a runtime or development dependency
0.15
RgGen is a code generation tool for ASIC/IP/FPGA/RTL engineers.
It will automatically generate source code related to control and status registers (CSR),
e.g. SytemVerilog RTL, UVM RAL model, C header file, Wiki documents, from human readable register map specifications.
2019
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